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NIST’s CHIPS R&D Office Releases Guidance to Improve Metrology in Semiconductor Sector
Semiconductor_equipment

NIST’s CHIPS R&D Office Releases Guidance to Improve Metrology in Semiconductor Sector

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The National Institute of Standards and Technology’s CHIPS Research and Development Office has published a guidance to help address challenges in metrology in the semiconductor sector.

The document, entitled “Metrology Gaps in the Semiconductor Ecosystem,” aims to improve measurements, standardization and simulations to strengthen the industry, CHIPS R&D announced Monday.

A study conducted by the office found gaps in metrology in semiconductor value chain areas including assembly, packaging, fabrication, laboratory, prototyping and performance verification.

Based on the findings, CHIPS R&D established a metrology program guided by 10 focus areas, such as advanced metrology for supply chain trust and assurance, as well as advanced modeling verification, validation, and development for next generation manufacturing processes.

The office also recommended the standardization of automation, virtualization, security, and equipment and software interoperability. In terms of next-generation microelectronics, the guidelines suggested that special attention be given to metrology for advanced materials and devices, nanostructured materials characterization and 3D structures and devices.